by S. Shapero, A.S. Charles, C. Rozell and P. Hasler
Abstract:
Compressed sensing is an important optimization problem in signal and image processing applications. A Hopfield-Network-like analog system is proposed as a solution, using the Locally Competitive Algorithm (LCA) to solve an overcomplete l1 sparse approximation problem. A scalable system architecture using sub-threshold currents is described, including vector matrix multipliers (VMMs) and a nonlinear thresholder. A 4x6 nonlinear system is implemented on the RASP 2.9v chip, a Field Programmable Analog Array with directly programmable floating gate elements, allowing highly accurate VMMs. The circuit successfully reproduced the outputs of a digital optimization program, converging to within 4.8% RMS, and an optimization cost only 1.3% higher on average. The active circuit consumed 29μA of current at 2.4V, and converges on solutions in 240μs. A smaller 2x3 system is also implemented. Extrapolating the scaling trends to N=1000 node system, the Analog LCA compares favorably with State-of-the-Art digital solutions.
Reference:
Low Power Sparse Approximation on Reconfigurable Analog HardwareS. Shapero, A.S. Charles, C. Rozell and P. Hasler. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2(3), pp. 530–541, September 2012. Special issue on Circuits, Systems and Algorithms for Compressive Sensing.
Bibtex Entry:
@Article{shapero.11c,
author = {Shapero, S. and Charles, A.S. and Rozell, C. and Hasler, P.},
title = {Low Power Sparse Approximation on Reconfigurable Analog Hardware},
abstract = {Compressed sensing is an important optimization problem in signal and image processing applications. A Hopfield-Network-like analog system is proposed as a solution, using the Locally Competitive Algorithm (LCA) to solve an overcomplete l1 sparse approximation problem. A scalable system architecture using sub-threshold currents is described, including vector matrix multipliers (VMMs) and a nonlinear thresholder. A 4x6 nonlinear system is implemented on the RASP 2.9v chip, a Field Programmable Analog Array with directly programmable floating gate elements, allowing highly accurate VMMs. The circuit successfully reproduced the outputs of a digital optimization program, converging to within 4.8% RMS, and an optimization cost only 1.3% higher on average. The active circuit consumed 29μA of current at 2.4V, and converges on solutions in 240μs. A smaller 2x3 system is also implemented. Extrapolating the scaling trends to N=1000 node system, the Analog LCA compares favorably with State-of-the-Art digital solutions. },
url = {http://siplab.gatech.edu/pubs/shaperoJETCAS2012.pdf},
year = 2012,
month = sep,
volume = 2,
number = 3,
pages = {530--541},
note = {Special issue on Circuits, Systems and Algorithms for Compressive Sensing.},
journal = {IEEE Journal on Emerging and Selected Topics in Circuits and Systems}
}