by P. Brown, M. O'Shaughnessy, C.J. Rozell, J. Romberg and M. Flynn
Abstract:
A prototype compressed sensing radar processor boosts the accuracy of target range and velocity estimations by over 6x compared to conventional processing techniques. The prototype employs the locally competitive algorithm to numerically solve basis pursuit denoising with a biologically-plausible spiking neural-network. A unique form of weight compression allows on-chip storage of all weights for the large fully-connected network. Capable of producing over 200,000 estimates per second, the prototype improves throughput by 8x and efficiency by 18x over state-of-the-art.
Reference:
A 17.8 MS/s Compressed Sensing Radar Accelerator Using a Spiking Neural NetworkP. Brown, M. O'Shaughnessy, C.J. Rozell, J. Romberg and M. Flynn. IEEE Journal of Solid State Circuits, 56(3), pp. 834–843, March 2021.
Bibtex Entry:
@Article{brown.20b,
author = {Brown, P. and O'Shaughnessy, M. and Rozell, C.J. and Romberg, J. and Flynn, M.},
title = {A 17.8 {MS/s} Compressed Sensing Radar Accelerator Using a Spiking Neural Network},
year = 2021,
month = mar,
abstract = {A prototype compressed sensing radar processor boosts the accuracy of target range and velocity estimations by over 6x compared to conventional processing techniques. The prototype employs the locally competitive algorithm to numerically solve basis pursuit denoising with a biologically-plausible spiking neural-network. A unique form of weight compression allows on-chip storage of all weights for the large fully-connected network. Capable of producing over 200,000 estimates per second, the prototype improves throughput by 8x and efficiency by 18x over state-of-the-art.},
journal = {IEEE Journal of Solid State Circuits},
volume={56},
number={3},
pages={834--843},
doi={10.1109/JSSC.2020.3025864}
}